A 1.8V and 2GHz Inductively Degenerated CMOS Low Noise Amplifier

This paper presents the design and simulation of Low Noise Amplifier (LNA) in a 0.18μm CMOS technology. The LNA function is to amplify extremely low noise amplifier without adding noise and preserving required signal to noise ratio. Cadence design tool Spectre_RF is used to design and simulation based on resistors, inductors, capacitors and transistors. Power constrained methodology is used for the design of Low Noise Amplifier. The amplifier provides a forward gain (S21) of 18.22dB with noise figure (NF) of 2.49dB while drawing 8.1mW power from a 1.8V voltage supply.