A Scheme and Behavior Analysis of Duplicated Ports Switches with Line Rate Buffers
线路速率缓存的重端口交换机方案及行为分析

Nowadays, Internet is facing two challenges simultaneously: the need of a higher switching speed and the provision of a QoS guarantee. The former requires that memories in switches/routers should work at a line rate, and the latter requires that switches should mimic OQ (output queuing) switches. The present CIOQ (combined input-output queuing) scheme for switches needs a speedup of 2. In this paper, a novel design scheme based on parallel technique is proposed, which is called DPS (duplicated ports switch). DPS enables the internal fabric of switches to work at the line rate. A theoretical proof shows that each port with a duplicated number of 2 is sufficient to mimic the OQ switches and is necessary in practice.