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OALib Journal期刊
ISSN: 2333-9721
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Design of loop filter for high order charge-pump phase-locked loops
高阶电荷泵锁相环环路滤波器的设计

Keywords: CPPLL,loop filter,stability,phase jitter
电荷泵锁相环
,环路滤波器,稳定性,相位抖动

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Abstract:

Considering the characteristics of discrete-time sampling for charge-pump phase-locked loops(CPPLLs), we propose a blocking design method for loop filter in high order CPPLLs. By this method, the CPPLL of any optional order and type can be derived, and phase jitters can be eliminated. Also, high frequency step input or ramp input can be tracked. By analyzing the stability and characteristics of CPPLLs, the range of the candidate loop parameters can be determined, from which the obtained CPPLLs of n-th order and n type are superior to others. Effectiveness of the design method and correctness of the analysis method are validated by the simulations of two types of CPPLLs. The proposed method provides an important reference and guideline for the design of high order CPPLLs Loop filters.

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