Application-specific Network-on-Chip Topology Optimization Based on Two-level Genetic Algorithm
基于两级遗传算法的特定应用片上网络拓扑优化

Large scale system-on-chip is facing several communication problems, such as performance, synchronization and power dissipation. Network-on-chip provides a most promise solution to the communication challenges of complicated system-on-chip. Because network topology optimization is known to be an NP-hard problem, aiming at the characteristic that most system-on-chips arc application-specific, this article proposed a two-level generic algorithm to solve the approximate solutions to the topology optimization problem. Experiments show that the proposed method can, on average, improve about 1.1% the minimal power consumption and 97% simulation time which is greatly reduced by comparing to the existing threclevcl generic algorithm.