Specified Model of Embedded System Design Based on SystemC
基于SystemC的嵌入式系统设计的描述模型

System modeling is an essential design in embedded system. It will directly affect design quality and time on market. Nowadays, there are some modeling solutions, but each of them has its limits. In this paper a new modeling frame of embedded system design is presented that consists of 5 level abstraction models. The suggested solutions make up of specification the product ~s requirements, establishing CDM model, consistently verifying these constructed components to satisfy the requirements of design, and mapping them into the SystemC abstraction models. With SystemC hardware properties and simulation kernel, the models can be gradually refined and verified by adding details. The suggested approaches get the aim of the hardware-software co-design and synthesis implementation.