A High performance Hardware Architecture of CABAC Decoder
一种高效的CABAC解码器硬件结构设计

Comparing to other entropy coding standard,CABAC(context adaptive binary arithmetic coding) has more significant enhancement in compression.However,its encoding/decoding efficiency is low due to calculation complexity and costs in memory access.To deal with the "bottleneck" problem in decoding process,the article proposes efficient hardware architecture for CABAC decoder,including a new memory access mode,an optimizing decoding core and four concatenating decoding engines.The experimental results show that the decoding efficiency is greatly increased by the hardware architecture.