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Functional-level Fault Simulation with concurrent and parallel mechanisms using object-oriented VLSI model
Functional-Level Fault Simulation with Concurrent and Parallel Mechanisms Using Object-Oriented VLSI Model

Keywords: Functional-level test,VLSI modeling,concurrent,parallel,test set compaction
集成电路
,超大规模集成电路,检测软件,模拟算法

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Abstract:

The functional-level test has been proposed as an alternative to reduce the complexity of test when VLSI gets larger and more complicated. It has been successful for circuits such as memories, PLAs and microprocessors. However, the functional-level test for general functional models has seldom been studied. This paper presents an object-oriented VLSI model and a functional-level fault simulation methodology for general functional model. Based on the proposed VLSI model, FFS (Functional-level Fault Simulator) with friendly visual interface has been implemented on Microsoft Windows platform by use of C . It is an integral part of FMVS (Functional test Modeling and Verification System)-an extended subsystem of TeDS (Test Development System). The goal of FFS is to determine the fault coverage, generate fault dictionary and compact original test set at the function-level. In order to be efficient, FFS uses the concurrent and parallel mechanisms by taking advantage of the object-oriented VLSI model. The object-oriented VLSI model based fault simulation has been validated in the functional-level test by simulation results and the satisfying performance of FFS.

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