A Built-in Test Pattern Generator

Built-in testing is currently of more concern due to the difficulties in testing a VLSI byusing an external tester.In addition,Built-In Testing is also necessary for on-line testing and afault-tolerant computing system.Using a Linear Feedback Shift Register(LFSR)as a built-intest pattern generator(BITPG)is a realistic and simple approach.An LFSR with maximumlength can generate pseudo-random test patterns or all non-null vectors for exhaustive testing.This paper presents an LFSR design with non-maximum length to serve as a BITPG to generatea given test set T,which efficiently saves testing time.A search-verification process fordesigning this kind of LFSR is employed and implemented by the program SVBITPG.Thispaper presents the diagram of tire program and gives stone examples to illustrate the design ofthe BITPG.