New S-boxes for hardware implementation of AES
适合AES算法硬件实现的新S盒

To promote the performance of AES in hardware, a new S box for AES was constructed thorough analyzing the structure of AES S box. Compared to the AES S box, the most important feature of new S box is that it can implement with a small amount of gates and get faster processing, so it is more applicable in resource constrained device. Meanwhile, the characteristics of the S box and the safety of the modified AES were analyzed, which proves the safety to AES with new S box.