Applying transaction-based verification using SystemC
使用SystemC进行基于事务的验证

As the Application Specific Integrated Circiut(ASIC) design size increases, the chip verification is one of the most important phases. Transaction-based verification method using SystemC was introduced and analyzed. A concrete chip design was verified with this verificaton method and other traditonal verification methods. The test results show that transaction-based verification can get better effect and higher efficiency.