Study of dynamically reconfigurable algorithm for low-power cache
一种低功耗动态可重构cache算法的研究

Pynamically reconfigurable the algorithm used the instruction-cycle to detect phase changes. In each phase, the state machine used the average access time to predict the cache access and obtained optimal configuration. The experimental results show that the algorithm can reduce cache power dissipation by 61%, but increasing CPI by 2% on average compared with four-way conventional cache, and further saves the energy consumption and reduces the performance loss compared to the previous works.