On-chip debug and real-time trace support for superscalar DSP
超标量DSP的片上调试与实时跟踪支持*

For the growing debug challenges of embedded systems, this paper presented and implemented an on-chip debug and real-time trace architecture for 32 bit superscalar DSP core. Due to the dedicated trace interface and other hardware resources, the expanded JTAG port, memory protection logic and pipeline control logic, this architecture could support the following typical debug features with low hardware efforts: real-time run control, non-incursive access of internal registers and local memories, complex hardware breakpoints and watchpoints, hardware single-stepping, and real-time program trace. Consequently, this on-chip debug and real-time trace architecture can meet the development and debugging need for most embedded systems.