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Top-k delay noise failure analysis method
基于优先性的延迟噪声故障分析方法*

Keywords: very large scale integration circuit design,crosstalk noise,delay noise failure,timing analysis
超大规模集成电路设计
,串扰噪声,延迟噪声故障,时序分析

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Abstract:

To reduce the impacts of interconnection crosstalk noise on the circuit performance,this paper proposed a top-k delay noise failure analysis method.The logic relations were considered to effectively prune the analysis space of victim line and aggressor lines.Then the occurrence probability of the false delay noise failure between the victim line and aggressor line was computed using the timing window.Furthermore,the top-k aggressor lined which had the largest probabilities to cause false delay noise failures in real circuits could be found.The largest number of false failures can be filtered within runtime,producing a significant pessimism reduction for the crosstalk-aware timing analysis.

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