Analysis and Optimization for Processor Architecture Simulator (SimpleScalar)
微处理器体系结构模拟器SimpleScalar分析与优化*

The SimpleScalar tool set, a collection of publicly-available simulation tools published by University of Wisconsin Madison, is a great convenience for computer architecture designers. We analyze the structure and work-flow of SimpleSealar. A new method is proposed for shortening the simulation time. During the tests of 6 benchmark programs, the new method decrease the simulation time to nearly 50% by reconfiguring the makefile of the simulator and some parameters.