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Block Decision Feedback based Joint Detection Algorithm for TD-SCDMA and Its VLSI Implementation
TD-SCDMA中基于块判决反馈的联合检测算法及其VLSI实现

Keywords: TD-SCDMA,Joint Detection (JD),VLSI architecture
TD-SCDMA
,联合检测,VLSI架构,基于块,判决反馈,检测算法,VLSI,Implementation,Detection,Algorithm,Joint,based,Decision,Feedback,工艺,架构,功耗,面积,协处理器,联合检测,计算复杂度,性能损失,成本,终端

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Abstract:

A new Joint Detection (JD) algorithm, named as Block-Decision-Feedback based Joint Detection (BDF-JD), is proposed for TD-SCDMA. Comparing to the existing algorithms, BDF-JD has much less computational complexity and comparable performance, and is very suitable for terminals. Based on BDF-JD, the architecture of the JD coprocessor is proposed. Implemented with the 0.18 μ m process of SMIC, the coprocessor only consumes 160 k gates.

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