An Improved Efficient Architecture for Wideband Digital Down Conversion
一种改进的宽带数字下变频高效结构

First, this paper analyzes the very reason of efficiency in the existing efficient architecture for wideband Digital Down Conversion (DDC) and points out some problems, and then deduces a novel method: decimation prior to filtering and synchro-tuning by the use of Goertzel filter. By comparing it with the typical architecture and the existing efficient architecture for wideband DDC, performance of new method is discussed to be flexible, efficient and finite cost. Computer simulation illustrates its feasibility.