ANALYSIS OF SYNCHRONOUS SEQUENTIAL CIRCUITS BASED ON EXTENDED PETRI NET
同步时序电路的增广Petri网分析

The models of the basic gates and typical flip-flops for Petri net are constructed by using a kind of extended Petri net with inhibitor arc. Then the syncronous sequential circuit are described. The enabled matrixes, the state equations and the relation between the next state of flip-flop and the enabled transition are given. Based on these, the analysis method of Petri net for synchronous sequential circuits is discussed. It is proved that the theory is effective by practical examples.