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A novel SOI-DTMOS structure from circuit performance considerations
从电路特性方面考虑而提出的SOI-DTMOS新结构

Keywords: partially?depleted silicon-on-insulator,dynamic?threshold?MOSFET,?body capacitance,body resistivity
部分耗尽绝缘体上硅,动态阈值,
,体电容,体电阻,硅膜厚度,延时

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Abstract:

The performance of a partially depleted silicon-on-insulator (PDSOI) dynamic threshold MOSFET (DTMOS) is degraded by the large body capacitance and body resistance. Increasing silicon film thickness can reduce the body resistance greatly, but the body capacitance also increases significantly at the same time. To solve this problem, a novel SOI DTMOSFET structure (drain/source-on-local-insulator structure) is proposed. From ISE simulation, the improvement in delay, obtained by optimizing p-n junction depth and silicon film thickness, is very significant. At the same time, we find that the drive current increases significantly as the thickness of the silicon film increases. Furthermore, only one additional mask is needed to form the local SIMOX, and other fabrication processes are fully compatible with conventional CMOS/SOI technology.

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