A High-Performance Sample-and-Hold Circuit with Sampling Bandwidth Compensation
一种具有采样带宽补偿的高性能采样/保持电路

A novel charge exchanging compensation (CEC) technique is proposed for a wideband sample-and-hold (S/H) circuit applied in an IF sampling ADC.The CEC technique compensates the sampling bandwidth by eliminating the impact from finite on-resistance of the sampling switch,and avoids increasing clock feedthrough and charge injection.Meanwhile,a low power two stage OTA with a class AB output stage is designed to provide the S/H a 3Vp-p input range under 1.8V power.The S/H achieves a 94dB spurious-free dynamic range for a 200MHz input signal at a 100Ms/s sample rate and consumes only 26mW with a 5.5pF load.