A Low-Power VLSI Architecture for Telescopic Search Block-Matching Motion Estimation
基于望远镜搜索的块匹配运动估值的低功耗VLSI结构

An architectural enhancement is presented to reduce the power consumption of the telescopic search block-matching motion estimation based on a novel early-jump-out technique for computing block-matching errors.Augmenting it to the conventional systolic-architecture-based VLSI engine for the telescopic search can avoid unnecessary computations.A simple estimation based on the algorithm simulation results shows that,our enhanced architecture consumes 40% as much power as the conventional architecture.Meanwhile,the same throughput and a similar image quality are maintained.