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Dynamic avalanche behavior of power MOSFETs and IGBTs under unclamped inductive switching conditions
功率MOS和IGBT器件在无嵌位电感开关条件下的动态雪崩特性研究

Keywords: UIS test,parasitic bipolar transistor,power MOSFETs,IGBT,parasitic thyristor
无嵌位电感开关测试
,寄生双极晶体管,功率场效应管,绝缘栅双极晶体管,寄生晶闸管

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Abstract:

The ability of high-voltage power MOSFETs and IGBTs to withstand avalanche events under unclamped inductive switching (UIS) conditions is measured. This measurement is to investigate and compare the dynamic avalanche failure behavior of the power MOSFETs and the IGBT, which occur at different current conditions. The UIS measurement results at different current conditions show that the main failure reason of the power MOSFETs is related to the parasitic bipolar transistor, which leads to the deterioration of the avalanche reliability of power MOSFETs. However, the results of the IGBT show two different failure behaviors. At high current mode, the failure behavior is similar to the power MOSFETs situation. But at low current mode, the main failure mechanism is related to the parasitic thyristor activity during the occurrence of the avalanche process and which is in good agreement with the experiment result.

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