An Asynchronous Implementation of Add-Compare-Select Processor for Communication Systems

A novel asynchronous ACS(add-compare-select) processor for Viterbi decoder is described.It is controlled by local handshake signals instead of the globe clock.The circuits of asynchronous adder unit,asynchronous comparator unit,and asynchronous selector unit are proposed.A full-custom design of asynchronous 4bit ACS processor is fabricated in CSMC-HJ 0.6μm CMOS 2P2M mixed-mode process.At a supply voltage of 5V,when it operates at 20MHz,the power consumption is 75.5mW.The processor has no dynamic power consumption when it awaits an opportunity in sleep mode.The results of performance test of asynchronous 4bit ACS processor show that the average case response time 19.18ns is only 82% of the worstcase response time 23.37ns.Compared with the synchronous 4bit ACS processor in power consumption and performance by simulation,it reveals that the asynchronous ACS processor has some advantages than the synchronous one.