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半导体学报 2005
A Characterization Simulation of a Deep Sub-Micron GGNMOSFET Under TLP Stress
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Abstract:
Based on simulation,the characteristics and mechanisms of failure on a deep sub-micron grounded-gate NMOS (GGNMOS) are studied under TLP(transmission line pulse) stress.The conclusion is drawn from the analysis that the resistor in series with the gate can reduce the maximum drain voltage;and the electric field across the gate oxide can be enhanced due to the existence of the overlap capacitance between the gate and drain under TLP stress.The electric field across the gate oxide will increase as the rise-time of the applied TLP pulse decreases,which will lead to a premature breakdown of gate oxide.Simulation results show that the overlap capacitance of the gate and drain and the resistor in series with the gate is very important to the turn-on characteristic and ESD patience voltage of the GGNMOS protection structure.These can be provided for future TLP tests and standardizations.