A radiation-hardened SOI-based FPGA
基于SOI的抗辐射加固FPGA芯片

A radiation-hardened SRAM-based Field Programmable Gate Array (FPGA) VS1000 was designed and fabricated with 0.5 um partial-depletion silicon-on-insulator (SOI) logic process in CECT 58th institute. The novel logic cell (LC) with multi-mode based on 3-input look-up-table (LUT) increases logic density about 12% compared with a traditional 4-input LUT. The logic block (LB) consisting of 2 LCs can be used in two functional modes: LUT mode and distributed read access memory (RAM) mode. The hierarchical routing channel block (CHB) and switch block (SB) can significantly improve the flexibility and routability of routing resource. The VS1000 with the package CQFP208 contains 392 reconfigurable LCs, 112 reconfigurable user I/Os and IEEE 1149.1 compatible with boundary-scan logic for testing and programming. The function test results indicate that hardware and software cooperate successfully and the VS1000 works correctly. Moreover the radiation test results indicate that the VS1000 chip has total dose tolerance of 100Krad(Si), dose rate survivability of 1.51011rad(Si)/s and neutron fluence immunity of 11014 n/cm2.