In this work, we show that
an excessive lattice heating problem can occur in the diode electrostatic
discharge (ESD) protection device connected to a VDD？bus in the popular diode input protection
scheme, which is favorably used in CMOS RF ICs. To figure out the reason for
the excessive lattice heating, we construct an equivalent circuit for input
human-body model (HBM) test environment of a CMOS chip equipped with the diode
protection circuit, and execute mixed-mode transient simulations utilizing a
2-D device simulator. We analyze the simulation results in detail to show out
that a parasitic pnp bipolar transistor action relating nearby p+-substrate
contacts is responsible for the excessive lattice heating in the diode
protection device, which has never been focused before anywhere.
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