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Division-Free Multiquantization Scheme for Modern Video Codecs

DOI: 10.1155/2012/302893

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The current trend of digital convergence leads to the need of the video encoder/decoder (codec) that should support multiple video standards on a single platform as it is expensive to use dedicated video codec chip for each standard. The paper presents a high performance circuit shared architecture that can perform the quantization of five popular video codecs such as H.264/AVC, AVS, VC-1, MPEG-2/4, and JPEG. The proposed quantizer architecture is completely division-free as the division operation is replaced by shift and addition operations for all the standards. The design is implemented on FPGA and later synthesized in CMOS 0.18? m technology. The results show that the proposed design satisfies the requirement of all five codecs with a maximum decoding capability of 60?fps at 187?MHz on Xilinx FPGA platform for 1080?p HD video. 1. Introduction An evident trend in modern world is the digital convergence in the current electronic consumer products. People want the portable devices to have various functions like Video on Demand (VOD), Digital Multimedia Broadcasting (DMB), Global Positioning System (GPS) or the navigation system, Portable Multimedia Player (PMP), and so on. Due to such demand, it is necessary to support the widely used video compression standards in a single system-on-chip (SoC) platform. So the goal is to find a way so that the multicodec system achieves high performance, as well as low cost. Most modern multimedia codecs (both encoder and decoder) employ transform-quantization pair as shown in Figure 1. A significant research has been conducted to combine and efficiently implement the transform units for multiple codecs, but little research is focused on the implementation of multiquantizer unit. A unified Inverse Discrete Cosine Transform (IDCT) architecture to support five standards (such as, AVS, H.264, VC-1, MPEG-2/4, and JPEG) is presented in [1]. A design to support the 4 × 4 transform and quantization of H.264 has been presented in [2]. The 8 × 8 transform and quantization for H.264 is presented in [3] and [4]. Several other designs based on H.264 codec have been reported in [5–10]. The authors in [11] present a design for the quantization for AVS. The design in [12] describes an MPEG-2 encoder. In [13], another JPEG encoder is implemented for images where the quantization block is designed using multiplication and shift operation instead of division. The design in [14] describes a multistandard video decoder to support four codecs—AVS, H.264, VC-1, and MPEG-2. Silicon Image Inc. currently supplies a Multi-standard


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