Image processing in machine vision is a challenging task because often real-time requirements have to bemet in these systems. To accelerate the processing tasks in machine vision and to reduce data transferlatencies, new architectures for embedded systems in intelligent cameras are required. Furthermore,innovative processing approaches are necessary to realize these architectures efficiently. Marching Pixelsare such a processing scheme, based on Organic Computing principles, and can be applied for example todetermine object centroids in binary or gray-scale images. In this paper, we present a processing pipelinefor smart camera systems utilizing such Marching Pixel algorithms. It consists of a buffering template forimage pre-processing tasks in a FPGA to enhance captured images and an ASIC for the efficientrealization of Marching Pixel approaches. The ASIC achieves a speedup of eight for the realization ofMarching Pixel algorithms, compared to a common medium performance DSP platform.