With introduction of high-k gate oxide materials, the degradation effect Positive Bias Temperature Instability (PBTI) is starting to play an important role. Together with the still effective Negative Bias Temperature Instability (NBTI) it has significant influence on the 6T SRAM memory cell. We present simulations of both effects, first isolated, then combined in SRAM operation. During long hold of one data, both effects add up to a worst case impact. This leads to an asymmetric cell, which, in a directly following read cycle, combined with the generally unavoidable production variations, maximizes the risk of destructive reading. In future SRAM designs, it will be important to consider this combination of effects to avoid an undesired write event.