FPGA Implementation of OFDM Transceiver using FFT Algorithm

Orthogonal Frequency Division Multiplexing (OFDM) is the most promising modulation technique. It has been adopted by most wireless and wired communication standards. The idea is to utilize a number of carriers, spread regularly over a frequency band, in such a way so that the available bandwidth is utilized to maximal efficiency. In this paper the design and implementation of OFDM on a Field Programmable Gate Array (FPGA) device has been presented. This attractive architecture uses Radix-2 serialized 512-point FFT (Fast Fourier Transform) algorithm that enhances its speed. The system design is optimized in terms of both area and speed. The implementation was made on FPGA since it allows flexibility in design and also it can achieve higher computing speed than digital signal processors. ASIC-like performance with lower development time and risks can also be achieved. The results show that the design has been simulated up to 227.355 MHz and it achieves higher speed and lower area.