In this paper, we report the observation and characterisation of a systematic error in the implementation of U3 gates in the IBM quantum computers. By measuring the effect of this gate for various rotation angles the error appears as an over-rotation, whose magnitude does not correlate with IBM’s cited errors calculated using Clifford randomized benchmarking. We propose a simple mitigation procedure to limit the effects of this error. We show that using a simple mitigation strategy one can obtain improved results in the observed value for the CHSH inequality, measured in a cloud-based quantum computer. This work highlights the utility of simple mitigation strategies for short-depth quantum circuits.
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