Implementation of Pipeline Structure on FPGA for SHA-1
FPGA上SHA-1算法的流水线结构实现

Hash algorithm SHA-1 is used widely in cryptographic applications such as E-commerce and commercial encryption softwares. By making an overall analysis, implementation of pipeline structure was proposed. By shorting the critical path, using inside RAMs to realize the data translation instead of LE, we improved the frequency and the speed The performance on FPGAs of Altera is three times faster of commercial IP cores for SHA-1.