Design of pn Mixed Pull-Down Network Domino XOR Gate in 45nm Technology
45nm工艺pn混合下拉网络多米诺异或门设计

A pn mixed pull-down network technique is proposed, based on the application of pMOS transistor and nMOS transistor in the pull-down network,to lower the power and improve the performance of the domino circuits.First,a domino XOR gate with this technique is designed.Compared to the standard N type domino XOR gate,its static power and dynamic power are reduced by up to 46% and 3%,respectively.Second,using this technique,the dual-threshold voltage techniques and the multiple supply voltages techniques,a novel domino XOR gate is present and its static power and dynamic power are reduced by up to 82% and 21%,as compared to the standard N type domino XOR gate.At last,the minimum static power state of four XOR gates and AC noise margins are analyzed and obtained thoroughly.