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Degradation of nMOS and pMOSFETs with Ultrathin Gate Oxide Under DT Stress
直接隧穿应力下超薄栅氧MOS器件退化

Keywords: threshold voltage,interface traps,direct tunneling,SILC
阈值电压
,界面陷阱,直接隧穿,应力感应漏电流

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Abstract:

The degradation of device parameters and the degradation of the stress induced leakage current (SILC) of thin tunnel gate oxide under constant direct-tunneling voltage stress are studied using nMOS and pMOSFETs with 1.4nm gate oxides.Experimental results show that there is a linear correlation between the degradation of the SILC and the degradation of Vth in MOSFETs during different direct-tunneling (DT) stresses.A model of tunneling assisted by interface traps and oxide trapped positive charges is developed to explain the origin of SILC during DT stress.

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