A CMOS High-Speed Dual-Modulus Prescaler with New Filp-Flop
一种采用新触发器的高速CMOS前置分频器

In PLL design,Dual-Modulus Prescaler (DMP) is one of the bottlenecks in achieving a higher operation speed.To raise the speed,faster technologies or better designs are desirable.Actually,there exists a gap between the practical results and analytic results obtained by using the conventional method.A new analytic method is proposed to resolve this problem,which combines the digital and analog viewpoints.New D-FF and L-FF are such methods and the DMP formed with these flip-flops can raise the frequency greatly.