Growth of strained-Si material using low-temperature Si combined with ion implantation technology
低温硅结合离子注入技术制备应变Si材料

In order to fabricate strained-Si MOSFETs, we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate. By sandwiching a low-temperature Si (LT-Si) layer between a Si buffer and a pseudomorphic Si0.8Ge0.2 layer, the surface roughness root mean square (RMS) is 1.02 nm and the defect density is 1E6 cm-2 owing to the misfit dislocations restricted to the LT-Si layer and the threading dislocations suppressed from penetrating into the Si0.8Ge0.2 layer. By employing PC implantation and rapid thermal annealing, the strain relaxation degree of the Si0.8Ge0.2 layer increases from 85.09% to 96.41% and relaxation is more uniform. Meanwhile, the RMS (1.1 nm) varies a little and the defect density varies little. According to the results, the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.