%0 Journal Article
%T The Design of Ternary Field-Effect Transistors, DRAM Memory and NAND Flash Memory
%A Ben-Shan Wu
%A Xiang-Yao Wu
%A Sheng-Ji Xu
%J World Journal of Engineering and Technology
%P 307-328
%@ 2331-4249
%D 2025
%I Scientific Research Publishing
%R 10.4236/wjet.2025.132020
%X Based on the binary MOSFET and FinFET field-effect transistors, we have respectively designed ternary 0, +1, −1 digital signals using the improved MOSFET and FinFET field-effect transistors. On this basis, we have given the design principle and structure of ternary DRAM memory, that is, the reading +1, −1 and 0, and writing +1, −1 and 0 respectively, and also have given NAND flash memory, which include erasing operation, programming operation and reading operation. In addition, the arithmetic and logical operation rules of ternary are given. All the above works will lay a very important foundation for the development of ternary computer. All the above work will lay a very important foundation for the development of ternary computer.
%K Ternary
%K MOSFET Field-Effect Transistor
%K FinFET Field-Effect Transistor
%K Arithmetic Operations
%K Logical Operation
%K DRAM Memory
%K NAND Flash Memory
%U http://www.scirp.org/journal/PaperInformation.aspx?PaperID=142866