%0 Journal Article
%T 相变存储器预充电读出方法
%A 雷宇
%A 陈后鹏
%A 王倩
%A 李喜
%A 胡佳俊
%A 宋志棠
%J 浙江大学学报(工学版)
%D 2018
%R 10.3785/j.issn.1008-973X.2018.03.015
%X 分析传统相变存储器读出方法读取速度受限的原因，提出一种预充电读出方法.该方法将本地位线充电到预充电电压后开始读取数据.预充电电压设置在第一参考电压和第二参考电压的中间值.第一参考电压为读取最高晶态电阻值的存储器件时的本地位线电压，第二参考电压为读取最低非晶态电阻值的存储器件时的本地位线电压.采用SMIC 40 nm CMOS工艺进行设计和仿真，1-Mb相变存储器的随机读取时间为6.64 ns；Monte Carlo仿真表明，最长随机读取时间为9.07 ns.传统读出方法的随机读取时间和最长随机读取时间分别为45.36 ns和128.1 ns.晶态单元读电流是4.84 μA.仿真结果表明，所提方法比传统方法能更好地抑制工艺角、电源电压和温度波动.</br>Abstract: The speed limit of the conventional read scheme of phase change memory was analyzed, based on which a pre-charge scheme was proposed aiming at speed up the read speed. As soon as the chip was switched to the reading mode, the local bit lines were charged to the pre-charge voltage. The pre-charge voltage was set at the average of local bit line voltages when reading a worst case set cell and a worst case reset cell. Designed and simulated in the SMIC 40 nm CMOS process, the read access time of 1-Mb phase change memory is 6.64 ns compared to the conventional 45.36 ns. Monte Carlo simulations show a 9.07 ns worst read access time compared to the conventional 128.1 ns. Set cell reading current is as small as 4.84 μA. Simulation results show that the proposed scheme has better process, voltage and temperature variation tolerance than the conventional scheme.
%U http://www.zjujournals.com/eng/CN/10.3785/j.issn.1008-973X.2018.03.015