%0 Journal Article
%T A novel double-node-upset-resilient radiation-hardened latch
%A Wang Qijun
%A Yan Aibin
%J Journal of Southeast University
%D 2018
%R 10.3969/j.issn.1003-7985.2018.02.006
%X To effectively tolerate a double-node upset, a novel double-node-upset-resilient radiation-hardened latch is proposed in 22 nm complementary-metal-oxide-semiconductor technology. Using three interlocked single-node-upset-resilient cells, which are identically mainly constructed from three mutually feeding back 2-input C-elements, the latch achieves double-node-upset-resilience. Using smaller transistor sizes, clock-gating technology, and high-speed transmission-path, the cost of the latch is effectively reduced. Simulation results demonstrate the double-node-upset-resilience of the latch and also show that compared with the up-to-date double-node-upset-resilient latches, the proposed latch reduces the transmission delay by 72.54%, the power dissipation by 33.97%, and the delay-power-area product by 78.57%, while the average cost of the silicon area is only increased by 16.45%.
%K radiation hardening
%K circuit reliability
%K soft error
%K double-node upset
%K single-node upset
%U http://ddxbywb.paperonce.org/oa/darticle.aspx?type=view&id=201802006