%0 Journal Article
%T An ECG-on-Chip with 535-nW/Channel Integrated Lossless Data Compressor for Wireless Sensors
%A C. J. Deepu
%A X. Zhang
%A W. -S. Liew
%A D. L. T. Wong
%A Y. Lian
%J Computer Science
%D 2014
%I arXiv
%R 10.1109/JSSC.2014.2349994
%X This paper presents a low-power ECG recording system-on-chip (SoC) with on-chip low-complexity lossless ECG compression for data reduction in wireless/ambulatory ECG sensor devices. The chip uses a linear slope predictor for data compression, and incorporates a novel low-complexity dynamic coding-packaging scheme to frame the prediction error into fixed-length 16-bit format. The proposed technique achieves an average compression ratio of 2.25x on MIT/BIH ECG database. Implemented in a standard 0.35 um process, the compressor uses 0.565K gates/channel occupying 0.4 mm2 for four channels, and consumes 535 nW/channel at 2.4 V for ECG sampled at 512 Hz. Small size and ultra-low power consumption makes the proposed technique suitable for wearable ECG sensor applications.
%U http://arxiv.org/abs/1409.8018v1