%0 Journal Article
%T Transistor Switches using Active Piezoelectric Gate Barriers
%A Raj K. Jana
%A Arvind Ajoy
%A Gregory Snider
%A Debdeep Jena
%J Physics
%D 2015
%I arXiv
%X This work explores the consequences of introducing a piezoelectric gate barrier in a normal field-effect transistor. Because of the positive feedback of strain and piezoelectric charge, internal charge amplification occurs in such an electromechanical capacitor resulting in a negative capacitance. The first consequence of this amplification is a boost in the on-current of the transistor. As a second consequence, employing the Lagrangian method, we find that by using the negative capacitance of a highly compliant piezoelectric barrier, one can potentially reduce the subthreshold slope of a transistor below the room temperature Boltzmann limit of 60 mV/decade. However, this may come at the cost of hysteretic behavior in the transfer characteristics.
%U http://arxiv.org/abs/1505.00378v1