%0 Journal Article
%T A Nonlinear Programming and Artificial Neural Network Approach for Optimizing the Performance of a Job Dispatching Rule in a Wafer Fabrication Factory
%A Toly Chen
%J Applied Computational Intelligence and Soft Computing
%D 2012
%I Hindawi Publishing Corporation
%R 10.1155/2012/471973
%X A nonlinear programming and artificial neural network approach is presented in this study to optimize the performance of a job dispatching rule in a wafer fabrication factory. The proposed methodology fuses two existing rules and constructs a nonlinear programming model to choose the best values of parameters in the two rules by dynamically maximizing the standard deviation of the slack, which has been shown to benefit scheduling performance by several studies. In addition, a more effective approach is also applied to estimate the remaining cycle time of a job, which is empirically shown to be conducive to the scheduling performance. The efficacy of the proposed methodology was validated with a simulated case; evidence was found to support its effectiveness. We also suggested several directions in which it can be exploited in the future. 1. Introduction This study attempts to optimize the performance of a job dispatching rule in a wafer fabrication factory. The production equation required by a wafer fabrication factory is very expensive and must be fully utilized. For this purpose, to ensure that the capacity does not substantially exceed the demand is a perquisite. Subsequently, how to plan the use of the existing capacity to shorten the cycle time and maximize the turnover rate is an important goal. In this regard, scheduling is undoubtedly a very useful tool. However, some studies [1¨C4] noted that job dispatching is very difficult task in a semiconductor manufacturing factory. Theoretically, it is an NP-hard problem. In practice, many semiconductor manufacturing factories suffer from lengthy cycle times and are not able to improve on their delivery promises to their customers. Semiconductor manufacturing can be divided into four stages: wafer fabrication, wafer probing, packaging, and final testing. The most important stage is wafer fabrication. It is also the most time-consuming one. In this study, we investigated the job dispatching for this stage. This field includes many different methods, including dispatching rules, heuristics, data-mining-based approaches [5, 6], agent technologies [5, 7¨C9], and simulation. Among them, dispatching rules (e.g., first-in first out (FIFO), earliest due date (EDD), least slack (LS), shortest processing time (SPT), shortest remaining processing time (SRPT), critical ratio (CR), the fluctuation smoothing rule for the mean cycle time (FSMCT), and the fluctuation smoothing rule for cycle time variation (FSVCT), FIFO+, SRPT+, and SRPT++) all have received a lot of attention over the last few years [5¨C7] and are the
%U http://www.hindawi.com/journals/acisc/2012/471973/