%0 Journal Article
%T A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-Threshold Sense Amplifiers
%A Peter Beshay
%A Joseph F. Ryan
%A Benton H. Calhoun
%J Journal of Low Power Electronics and Applications
%D 2013
%I MDPI AG
%R 10.3390/jlpea3020159
%X Device variability in modern processes has become a major concern in SRAM design leading to degradation of both performance and yield. Variation induced offset in the sense amplifiers requires a larger bitline differential, which slows down SRAM access times and causes increased power consumption. The effect aggravated in the sub-threshold region. In this paper, we propose a circuit that reduces the sense amp offset using an auto-zeroing scheme with automatic temperature, voltage, and aging tracking. The circuit enables flexible tuning of the offset voltage. Measurements taken from a 45 nm test chip show the circuit is able to limit the offset to 20 mV. A 16kB SRAM is designed using the auto-zeroing circuit for the sense amps. The reduction in the total read energy and delay is reported for various configurations of the memory.
%K offset compensation
%K SRAM
%K sense amplifier
%K auto-zeroing
%U http://www.mdpi.com/2079-9268/3/2/159