%0 Journal Article
%T Third-Order Quadrature Oscillator Circuit with Current and Voltage Outputs
%A Bhartendu Chaturvedi
%A Sudhanshu Maheshwari
%J ISRN Electronics
%D 2013
%R 10.1155/2013/385062
%X The paper presents a new quadrature oscillator of third order which can provide four quadrature current outputs and two quadrature voltage outputs. The new circuit employs three differential voltage current conveyors and six passive components, most of which are in grounded form. Circuit operation at high frequencies is verified along with nonideality and parasitic study. The circuit enhancement for generation of four phase clock waveforms is also given. The proposed circuit is a novel addition to the oscillator family. 1. Introduction Realization of quadrature oscillators using current mode active building blocks has received continuous attention ever since the advent of current conveyors. The literature has thus witnessed voluminous works which may run into an equally voluminous bibliography, which is beyond the scope of the present discussion and hence limited to some selected works of the last few decades [1¨C10]. Differential voltage current conveyor became popular in the late 1990s and continued to find applications in realizing oscillators till recently [11¨C17]. Besides the realization of multiphase oscillators, third-order quadrature oscillators found special attention owing to their low-distortion output generation capability [18¨C24]. As a result, numerous high performance oscillator circuits continue to find most recent space in the literature [25¨C29]. In this paper a new third-order quadrature oscillator based on DVCCs is proposed. The proposed circuit requires three DVCCs, three grounded capacitors, and three resistors, of which two are grounded. The circuit generates four quadrature current outputs at high impedance nodes and two quadrature voltage outputs. The circuit usability at high frequencies with low THD is demonstrated. The nonideal analysis as well as parasitic analysis is included to study the real world performance of the proposed circuit. The new proposal further enriches the subject area. Section 2 presents the actual circuit description. Section 3 is devoted to the nonideal analysis. Parasitics considerations are given in Section 4. Simulation results are given in Section 5. Application of the proposed circuit is further explored in Section 6. Lastly, Section 7 presents conclusion of the paper. 2. Proposed Circuit 2.1. CircuitsĄŻ Description The symbol and CMOS implementation of differential voltage current conveyor (DVCC) are shown in Figure 1. DVCC is a five-port building block and is characterized by the following port relationship: In a DVCC, terminals , exhibit infinite input impedance. Thus no current flows in terminal , .
%U http://www.hindawi.com/journals/isrn.electronics/2013/385062/