%0 Journal Article
%T A High-Efficiency Monolithic DC-DC PFM Boost Converter with Parallel Power MOS Technique
%A Hou-Ming Chen
%A Robert C. Chang
%A Kuang-Hao Lin
%J VLSI Design
%D 2013
%I Hindawi Publishing Corporation
%R 10.1155/2013/643293
%X This paper presents a high-efficiency monolithic dc-dc PFM boost converter designed with a standard TSMC 3.3/5V 0.35£¿¦Ìm CMOS technology. The proposed boost converter combines the parallel power MOS technique with pulse-frequency modulation (PFM) technique to achieve high efficiency over a wide load current range, extending battery life and reducing the cost for the portable systems. The proposed parallel power MOS controller and load current detector exactly determine the size of power MOS to increase power conversion efficiency in different loads. Postlayout simulation results of the designed circuit show that the power conversion is 74.9¨C90.7% efficiency over a load range from 1£¿mA to 420£¿mA with 1.5£¿V supply. Moreover, the proposed boost converter has a smaller area and lower cost than those of the existing boost converter circuits. 1. Introduction The great demands for portable electronic equipment, such as cellular phones, personal digital assistants (PDAs), digital cameras, and hand-held communication instruments are growing rapidly in the huge consumer markets [1¨C10]. The utilization of single-cell battery in the portable devices is increasing to reduce effectively the volume and weight of the products. Increasing the power efficiency of the converter is important to extend the lifetime of battery. Several popular techniques [1¨C7] have been extensively implemented. The pulse width modulation (PWM) technique is frequently adopted in the literature [3, 5¨C7]. The switching converter in PWM mode had high power efficiency and low ripple voltage operated in the heavy load. Unfortunately, when the switching converter is operated under medium-to-light loads, its power efficiency is seriously degraded. The fixed-frequency PWM suffers in this way because the switching loss dominates the total power loss with medium-to-light loads. The pulse-frequency modulation (PFM) technique in discontinuous-conduction mode (DCM) [1, 8] has been used to increase the power efficiency under the medium-to-light load conditions. The load current determined the switching frequency of switching converters with PFM technique. Thus, the lower switching frequency in PFM mode effectively reduced the switching loss under the medium-to-light loads. Some commercial dc-dc converters [2, 4] combined PWM and PFM techniques to get high power efficiency from heavy load to light load operations. Moreover, a segmented output stage for optimized efficiency, proposed by Trescases et al., has been used in PWM technique [8]. Although the proposed circuit [8] had a 7.5% better efficiency under
%U http://www.hindawi.com/journals/vlsi/2013/643293/