%0 Journal Article
%T Design and Analysis of Second and Third Order PLL at 450MHz
%A B. K. Mishra
%A Sandhya Save
%A Swapna Patil
%J International Journal of VLSI Design & Communication Systems
%D 2011
%I Academy & Industry Research Collaboration Center (AIRCC)
%X Designing of an analog circuit satisfying the design constraints for desired application is a challengingjob. Phase Lock Loop (PLL) is an important analog circuit used in various communication applicationssuch as frequency synthesizer, radio, computer, clock generation, clock recovery, global positioningsystem, etc. Since all these applications are operating at different frequency, satisfying design constraintsfor PLL with respect to type of PLL operating frequency, Bandwidth, Settling time and other parameters isan critical and time consuming issue. In this paper, selection and design for Second order and third orderPLL suggested using MATLAB, Simulink as a simulation tool. The simulated results for the design PLL at450 MHz indicates good accuracy when the behavior model is compared with the mathematical model.Finally the performance of PLL is tested and calculated for parameters like lock time, lock range,Bandwidth.
%K PLL
%K Charge Pump PLL
%K Baseband PLL
%K VCO
%K Simulink
%K CAD
%K EDA tool.
%U http://airccse.org/journal/vlsi/papers/2111vlsics09.pdf