%0 Journal Article
%T Implementation of Folding Transform on 4-pole Lattice Filter
%A Laxya
%A Tarun Kumar Rawat
%J International Journal of Advanced Electrical and Electronics Engineering
%D 2012
%I 
%X In this paper Folding transformation is applied on the 4-pole lattice filter, which is used to minimize the number of registers. In this problem the number of register will increase to 13 and when we applied the valid folding with the help of retiming. Then we will apply life time analysis and life time chart after applying life time analysis registers minimization techniques [4] are applied on 4-pole lattice filter where the number of registers required is 10.Design the required lattice filter is shown in Figure 6 so that area of the chip is minimized
%K DFG
%K Folding transformation
%K Retiming equation
%K Register minimization technique
%K Forward and backward allocation technique
%K Folded architecture
%U http://www.irdindia.in/Journal_IJAEEE/PDF/Vol1_Iss1/2.pdf