%0 Journal Article
%T Design of Low Power Multiplier with Energy Efficient Full Adder Using DPTAAL
%A A. Kishore Kumar
%A D. Somasundareswari
%A V. Duraisamy
%A T. Shunbaga Pradeepa
%J VLSI Design
%D 2013
%I Hindawi Publishing Corporation
%R 10.1155/2013/157872
%U http://dx.doi.org/10.1155/2013/157872