%0 Journal Article
%T Implementation of 1-bit Full Adder using Gate Difuision Input (GDI) cell
%A Arun Prakash Singh
%A Rohit Kumar
%J International Journal of Electronics and Computer Science Engineering
%D 2012
%I Buldanshahr : IJECSE
%X Now¨Ca-days in digital circuits design high speed, high throughput, small silicon area, and at the same time, lowpower consumption of digital circuit is most important things for digital circuit designers. In this paper a novel design method of a low power digital circuit is discussed, where the GATE DIFFUSION INPUT (GDI) technique has been used for the simultaneous generation of digital logic functions. Simulation results are performed by AIMSPICE based on 0.18¦Ìm CMOS technology, shows GDI technique of low power digital circuit design. Simulation results shows up to 45% reduction in power-delay product in GDI. GDI approach allows implementation of a wide range of complex logic functions using only two transistors. This method is suitable for designing of fast, low power circuits, using reduced number of transistor (as compared to CMOS techniques), while improving power characteristics.
%K Gate Diffusion Input (GDI)
%K Low Power Design
%K complex logic
%K Power characteristic
%U http://www.ijecse.org/wp-content/uploads/2012/08/Volume-1Number-2PP-333-342.pdf