%0 Journal Article
%T A Charge Pump Circuit by using Voltage-Doubler as Clock Scheme
%A Wen Chang Huang
%A Jin Chang Cheng
%A Po Chih Liou
%J International Journal of Design, Analysis and Tools for Integrated Circuits and Systems
%D 2011
%I Solari (HK) Co., Hong Kong
%X A new charge pump circuit with a clock that shows an increased clock voltage as its stage is increased is proposed in the paper. The charge pump circuit utilizes the cross-connected NMOS, voltage doubler, as a pumping stage. Each stage of the voltage-doubler provides a pair of complementary clock voltages.The clock voltage also increases as the stage of voltage doubler is increased. It shows that a voltage up to 37.85V was obtained after eight-stage's pumping of the circuit, through the simulation of HSpice under 0.35 um process with 2V of supply voltage and clock voltage.
%K Charge pump
%K high voltage clock generator
%K voltage doubler
%K engineering
%K circuit
%U http://ijdatics.distributedthought.com/current_issues/IJDATICS_01_01_05.pdf