%0 Journal Article
%T EXTRACTION AND SYNTHESIS OF CONTROL INFORMATION IN HIGH LEVEL SYNTHESIS<br>高级综合中控制信息的提取与综合
%A YE Meilong
%A ZHANG Dongxiao
%A HENG Donghui
%A JIN Yi
%A <br>叶梅龙
%A 张东晓
%A 恒东辉
%A 金毅
%J 软件学报
%D 1997
%I 
%X The authors discuss concisely, the process of high level synthesis and the extraction and transformation of control information generated in the said process. The authors also discuss the methodology of linking the result of data flow synthesis and that of control flow synthesis as well as the mapping to technology-dependent ASIC based on Xilinx FPGAs.
%K FSMD
%K scheduling
%K allocation
%K finite state machine
%K sequential logic synthesis<br>FSMD
%K 调度
%K 分配
%K 有限状态自动机
%K 时序逻辑综合
%U http://www.alljournals.cn/get_abstract_url.aspx?pcid=5B3AB970F71A803DEACDC0559115BFCF0A068CD97DD29835&cid=8240383F08CE46C8B05036380D75B607&jid=7735F413D429542E610B3D6AC0D5EC59&aid=3EC2A6ECE91DD6D75F61A174452BBE7D&yid=5370399DC954B911&vid=5D311CA918CA9A03&iid=708DD6B15D2464E8&sid=E002FF26604EFFAB&eid=AD0A5DE51C29AB9F&journal_id=1000-9825&journal_name=软件学报&referenced_num=1&reference_num=5